Pre-silicon Software Shift-left: Virtual Platforms to First-silicon Readiness

Running the software program of a new chip before the chip exists: which platform each piece of software is developed on as RTL matures, bring-up plans for firmware, drivers and the compiler, choosing a platform tier per test by speed and fidelity, carrying the same tests unchanged to silicon, readiness gates and dashboards for first silicon, and handling A0 and B0 steppings in software and CI.

Overview

The job

A chip that comes back from the fab is worth nothing until software runs on it. Shift-left means the boot firmware, drivers, compiler and test suites start a year or more before silicon, on models of the chip, so that on power-on day every failure points at the silicon and not at software nobody has run before.

That is a program, not a tool: someone decides which software runs on which platform as the design matures, which tests run where, what "ready for first silicon" means, and how the same tests carry on to A0 and B0. On accelerator and SoC teams that someone is often the CI or infrastructure engineer working with the software leads.

A concrete case (illustrative). An AI accelerator startup has 15 months to A0. It has a virtual platform farm on 200 CPU cores, one emulator with eight job slots, four FPGA prototypes arriving at month 10, and 60 engineers writing firmware, a kernel driver, a compiler backend and the day-one test suite. The CI engineer owns three things: the tier scheduler that sends each test to the cheapest platform that can run it, the harness that runs one binary unchanged on every platform, and the readiness dashboard that turns CI evidence into a go or no-go for power-on.

The mechanics of virtual platforms (SystemC TLM, QEMU co-simulation, register maps from one source) are in the System Design problem *Pre-Silicon Software: Virtual Platforms and SystemC TLM in CI*; emulator operations are in *Emulation & FPGA Prototyping Pipelines*; the bench is in *Post-silicon Validation & Bring-up Labs*.

Interview questions

  • First silicon is 15 months away. Lay out the software shift-left plan: which platform each piece of software uses, and when.
  • Design how CI decides which platform each test runs on, given a virtual platform farm, a small emulator and a few FPGA prototypes.
  • How do you make sure the tests written before silicon run unchanged on silicon?
  • Define the software readiness gates for first silicon and how the dashboard computes them.
  • How do you bring up a compiler and runtime for a new accelerator before silicon exists?
  • A0 has 40 known errata and B0 arrives in six months. How do software and CI handle both steppings?

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